m5 inv_S0 S0 Vdd Vdd pmos w=400nm l=65nm m6 inv_S0 S0 0 0 nmos w=100nm l=65nm m7 inv_S1 S1 Vdd Vdd pmos w=400nm l=65nm m8 inv_S1 S1 0 0 nmos w=100nm l=65nm * ---1st Transmission Gate for Input A ...
m5 inv_S S Vdd Vdd pmos w=400nm l=65nm m6 inv_S S 0 0 nmos w=100nm l=65nm * --- Transmission Gate for Input B (Passes when S=0) --- m1 B inv_S Vout Vdd pmos w=400nm l=65nm ; PMOS gets S (on when 0) m2 ...