IBM and its Research Alliance partners GLOBALFOUNDRIES and Samsung, and equipment suppliers have developed an industry-first process to build silicon nanosheet transistors that will enable 5 nanometer ...

Chipmakers are ramping up their 16/14nm finFET processes, with 10nm finFETs expected to ship sometime in late 2016 or early 2017. So what’s next? The foundries can see a path to extend the finFET ...

Security States, prefectures, cities, and villages: how one tiny Japanese CPU maker is taking a radically different route to making processors with thousands of cores Pro The AI tsunami: Apple's M5 ...

Just two years after developing a 7nm chip with 20 billion transistors, IBM has taken the wraps off technology that will usher in smaller, 5nm chips with higher performance and greater efficiency. IBM ...

IBM Research Alliance recently announced that they’ve developed a process to produce the world’s first 5nm transistors. The new transistors will allow IBM to squeeze as much as 30 billion transistors ...

Announced at the 2017 Symposia on VLSI Technology and Circuits conference in Kyoto, Japan, IBM and its research alliance partners, GlobalFoundries and Samsung described a 5 nm transistor. This silicon ...

Today IBM announced it has developed an industry-first process with its research partners to build silicon nanosheet transistors that will enable 5 nanometer chips. The details of the process will be ...

IBM and its key research partners managed to create a new type of a transistor that could theoretically fit 30 billion times into a 5-nanometer chip, which it also developed a manufacturing process ...

TSMC’s N3 technology will continue to use FinFET technology, the same transistor structure used today. By contrast, Samsung Foundry will switch to gate-all-around (GAAFET) transistor structure with ...

ALBANY, N.Y., June 5, 2017 /PRNewswire/ -- IBM (NYSE: IBM), its Research Alliance partners GLOBALFOUNDRIES and Samsung, and equipment suppliers have developed an industry-first process to build ...