IEEE

Logical circuit gate sizing using PSO guided by Logical Effort — An examination of the 4-stage half adder circuit

Abstract: Automated Complementary Metal Oxide Semiconductor (CMOS) logic circuit design leads to the reduction in costs associated with manpower and manufacturing time. Conventional methods use ...
Nature

CMOS-based carbon nanotube pass-transistor logic integrated circuits

Field-effect transistors based on carbon nanotubes have been shown to be faster and less energy consuming than their silicon counterparts. However, ensuring these advantages are maintained for ...
GitHub

cmos-basics-LTSPICE-VLSI

Basic CMOS Circuits Simulated with LTspice This repository contains simulations of basic CMOS (Complementary Metal-Oxide-Semiconductor) logic circuits using LTspice. It includes the implementation of ...
EDN

CMOS-Based Logic Probe Circuit

The circuit was designed to create a handy logic probe that can show off the logic states for high, low and pulsing outputs with the use of CMOS 4001 integrated circuit. Logic Probe – a handheld probe ...
Electronic Design

It’s Hot, Powering, And Burning CMOS Logic Circuits

Fig 1. A typical CMOS input circuit comprises a “P” and “N” transistor. One is fully “on” for logic high, and the other is “on” for a logic low. Fig 2. When a CMOS input pin is at logic high or low ...
PC Magazine

logic gate

A collection of transistors and resistors that implement Boolean logic operations in a digital circuit. Logic gates have one or two 0 or 1 inputs but only one 0 or 1 output as in the following ...