With continuous device scaling, process windows have become narrower and narrower due to smaller feature sizes and greater process step variability [1]. A key task during the R&D stage of ...

TL;DR: Samsung Electronics has successfully developed its 10nm-class 6th-generation D1c DRAM process, enabling advanced HBM4 memory production. This breakthrough enhances chip stability, reduces ...

For decades, compute architectures have relied on dynamic random-access memory (DRAM) as their main memory, providing temporary storage from which processing units retrieve data and program code. The ...

LONDON — Belgian research organization IMEC has extended its work on 32-nm CMOS device scaling to include a project on DRAM MIMCAP (metal-insulator-metal capacitors) process technology. The group says ...

TL;DR: Samsung's 1c DRAM yield for next-gen HBM4 memory has improved from 0% to around 40%, enabling planned mass production later this year. Design restructuring and process optimizations enhanced ...

BOISE, Idaho, Jan. 26, 2021 (GLOBE NEWSWIRE) -- Micron Technology, Inc. (Nasdaq: MU), today announced volume shipment of 1α (1-alpha) node DRAM products built using the world’s most advanced DRAM ...

CEO Andy Hsu will introduce new applications and variations for 3D NAND flash and 3D DRAM, including a new AI application called "Local Computing", drastically increasing AI chip performance to a new ...

Join the event trusted by enterprise leaders for nearly two decades. VB Transform brings together the people building real enterprise AI strategy. Learn more Micron Technology has launched its 1-beta ...