One of the most important steps in the design process is to identify how many different clocks to use and how to route them. This article tells you how to use routing resources efficiently.
Video standards and methods of encoding/decoding have made tremendous progress over the last decade with the availability of large system-on-a-chip (SOC) solutions using ASSPs, ASICs, or FPGAs. The ...
Clock domain crossing (CDC) issues cause significant amount of failures in ASIC and FPGA devices. As FPGA complexity and performance grows, the influence of CDC issues on design functionality grows ...
Clock domain crossings are significant sources of field system failures. Despite this fact, designs continue to be released without fully verified CDCs. A false sense of security resulting from ...
As FPGA designers strive to achieve higher performance while meeting critical timing margins, one consistently vexing performance bottleneck is the memory interface. Today's more advanced FPGAs ...
Different types of interface standards used in LVDS. Recommendations for interfacing FPGAs to ADCs. Methods of troubleshooting when connecting to the AD9268 ADC. 1. Multiple interface possibilities ...
The concept of creating a gaming portable out of a home console has been around for some time, but it’s hardly seen the other way around. There have been a few devices that dared to straddle the line ...
[Charlie] was killing some time hacking on some cheap FPGA dev boards he bought from eBay. Initially, he intended to use them to create HDMI ports for a different project before new inspiration hit ...
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