One of the most important steps in the design process is to identify how many different clocks to use and how to route them. This article tells you how to use routing resources efficiently.

Different types of interface standards used in LVDS. Recommendations for interfacing FPGAs to ADCs. Methods of troubleshooting when connecting to the AD9268 ADC. 1. Multiple interface possibilities ...

As FPGA designers strive to achieve higher performance while meeting critical timing margins, one consistently vexing performance bottleneck is the memory interface. Today's more advanced FPGAs ...

Clock domain crossings are significant sources of field system failures. Despite this fact, designs continue to be released without fully verified CDCs. A false sense of security resulting from ...

Clock domain crossing (CDC) issues cause significant amount of failures in ASIC and FPGA devices. As FPGA complexity and performance grows, the influence of CDC issues on design functionality grows ...

The concept of creating a gaming portable out of a home console has been around for some time, but it’s hardly seen the other way around. There have been a few devices that dared to straddle the line ...

[flow] is a little disillusioned with commercial Data Acquisition Systems (DAQs) and channeled his frustration into his own, very cool, FPGA based solution. The project takes form as a back plane into ...

By isolating each section, Eversolo minimizes noise and distortion—allowing for a cleaner soundstage and more precise stereo imaging. Precision Volume Control: The DAC-Z10’s independent left and right ...

GDA Technologies (San Jose, CA) is a design-for-hire engineering services firm that specializes in ASIC designs. Increasingly, however, our ASIC customers want to prototype in FPGAs before committing ...