Santa Cruz, Calif. — An “open encryption methodology” standard for silicon intellectual property will roll out this week, promising to unlock a much broader market for complex IP blocks. The proposal ...

The folks at Synplicity have just introduced something they call System Designer. This is a device-independent intellectual property (IP) configuration and system-level assembly environment that has ...

As SoC and system complexity rises continually and software drives much more in a system, specific vertical application areas will require tailored IP and tool flows to allow designers to meet time-to ...

Tool from Giga Scale IC offers new web-based access through ChipEstimate.com OTTAWA, Ontario, Canada – February 7, 2005 - MOSAID Technologies Incorporated (TSX:MSD) today announced its inclusion in ...

Results of an industry-wide survey of more than 900 professionals evaluating the state of IP and design data management.

Network-on-chip (NoC) interconnect IP and SoC integration technology enables higher product performance with lower power consumption and faster time-to-market. The considerable growth of the number of ...

HILLSBORO, Ore.--(BUSINESS WIRE)-- Lattice Semiconductor Corporation (NASDAQ: LSCC), the low power programmable leader, today announced a new version of Lattice Propel™, a design environment for ...

Building on the CORE-V processor IP, the solution is a full system-on-chip powered by CORE-V and boasts a full suite of peripherals. At embedded world 2023, OpenHW Group showcased its CORE-V Family of ...