Creating reusable and portable analog intellectual property (IP) is a key trend to watch in EDA for 2009 and beyond. Finding a way to develop reusable analog IP will allow designers to build ...

Deciding what to patent can be a confusing process but by creating a formal process it is something that every startup can manage. Intellectual property (IP) is one of the most valuable assets of a ...

To overcome 45-nm process challenges, semiconductor intellectual property (IP) providers and foundries are collaborating to provide designers with a combination of design resources and manufacturing ...

The partnership between X-FAB and Thalia aims to preserve the integrity of design transitions from one process node to ...

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced a wide range of leading semiconductor and system customers have successfully adopted the comprehensive ...

When reality television and entrepreneurship intertwine, shows like ‘Shark Tank’ and the UK’s equivalent ‘Dragons’ Den’ come to mind. Both programs involve aspiring entrepreneurs pitching (hopefully) ...

From a silicon design perspective, the industry has long held the notion that power consumption can be reduced simply by porting chips forward to the next process technology node. Yet as more consumer ...

ODVA has added process device profiles to the EtherNet/IP specification to provide a standard format for process variables and diagnostics and support Ethernet-APL. An example of EtherNet/IP CAT5e ...

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Cadence ® IP for GDDR6 is silicon proven on TSMC’s N6, immediately available on both N6 and N7 and ...

Process maintenance teams have long been challenged with gaining access and connectivity to service their field-level devices. Traditionally, plant personnel needed to walk out to the processing area ...