GitHub

nayakajay/gpu-tlb-covert-channel

This repository gives the implementation of proof-of-concept code used to evaluate a TLB-based covert channel on NVIDIA GPUs. We also provide the files used to reverse-engineer the TLB hierarchy of ...
IEEE

DTLB: Deterministic TLB for Tightly Bound Hard Real-Time Systems

Abstract: This paper proposes a novel TLB architecture - Deterministic Translation Lookaside Buffer - to reduce TLB misses, energy consumption and effective per access time. DTLB offers tighter upper ...
IEEE

A selective filter-bank TLB system [embedded processor MMU for low power]

Abstract: We present a selective filter-bank translation lookaside buffer (TLB) system with low power consumption for embedded processors. The proposed TLB is constructed as multiple banks with a ...
GitHub

Simple TLB (Translation lookaside buffer) realization on verilog.

This TLB implements a 64 entries, 8-way set associative, cache with PLRU replacement policy. The second level TLB (STLB) implements 12-way set associative cache with ...
HotHardware

Phenom TLB workaround benchmarked

Our friends at the Tech Report have a somewhat alarming article posted that you all should check out. By now, we suspect you’ve all heard about the ‘TLB bug’ affecting all current quad-core AMD ...